Stereo Video Processing for Depth Map
نویسندگان
چکیده
This paper describes the implementation of a stereo depth measurement algorithm in hardware on Field-Programmable Gate Arrays (FPGAs). This system generates 5-bit pixel disparities on 512 by 480 pixel images at video rate (30 frames/sec). The algorithm implemented is a window based scan-line correlation search technique. Hardware implementation speeds up the performance more than 100 times that of the same algorithm running in software. In this paper, we describe the programmable hardware platform, the base stereo vision algorithm and the design of the hardware. We try various video inputs and show sample outputs from the functioning hardware.
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